Abstract: The CMOS PLL based Frequency Synthesizer is a vital role in Receiver front end Sub component. The main objective of this paper is to design a high frequency of oscillation, less phase noise and power efficient PLL. In general, the PLL contains PFD, Loop Filter, VCO and Frequency Divider, Voltage controlled oscillator (VCO) is a critical building block in PLL which decides the power consumed by the PLL and area occupied by the PLL. Here the Source Coupled VCO is proposed with adaptive voltage level technique. It is designed in Tanner tool.

Keywords: Source Coupled VCO, PFD, PLL, Tanner tool, Frequency Divider and Charge Pump.