Design and Implementation of FPGA controlled Nine Level Inverter

Abstract: In this paper a nine-level staggered multi level inverter (MLI) by FPGA controller is presented. This inverter produces nine levels of AC output voltages with the effective gate signal design. The proposed inverter needs a single DC voltage supply with chain connection of four capacitors, five diodes, eight switches to synthesize output voltage levels and H-bridge cell. With single DC voltage source the present inverter eliminates the impartial allocation of DC voltage sources and switches. The switching losses and voltage stresses in the present converter are reduced. The total harmonic distortion (THD) in the output voltage is also less when compared to conventional topologies. The proposed work is first simulated in MATLAB/Simulink environment and then implemented using FPGA controller with VHDL interface.

Keywords: Multilevel inverter; voltage balance; AC output voltage; Total harmonic distortion (THD); FPGA controller.