Implementation of 2D-DWT for Image Compression using FPGA Architecture: A Review

Abstract: High performance digital signal processing is considered a significant contribute for high performance embedded computing and image processing. In this paper, we have provided the design of VLSI architecture of Implementation of 2D - DWT image processing system. In an image, the higher frequency sub-bands have finer time resolution, and the lower frequency sub-bands have larger time decision. Multi-resolution features of DWT and a new scheme of reading images from memory are employed to reduce the memory requirements. In the existing system most of the image compression algorithms are implemented on MATLAB platform and is required to transform the image before the compression. But the existing system utilizes more memory and reduced performance. To increase the performance of the image compression we are implementing the transformation on FPGA. This review paper compares different architectures.

Keywords: Xilinx Tool, DWT (Discrete wavelet transform), MATLAB Tool, Lifting scheme, Image Processing.