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International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering
International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering A monthly Peer-reviewed & Refereed journal
ISSN Online 2321-2004ISSN Print 2321-5526Since 2013
IJIREEICE meets the suggestive parameters outlined in the latest University Grants Commission (UGC) for peer-reviewed journals, ensuring high standards of research integrity, publication ethics, and academic excellence.
← Back to VOLUME 10, ISSUE 4, APRIL 2022

An Experimental Verification Of Meritorious Effect Of The Shared Resources In Design Of Arithmetic Circuits

S.Soorya, E.Sriram, S.Shameer Hussain, S.Sivasankar, Mr.C.Saravanakumar

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Abstract: This study gives us a conceptual description of Xilinx System Generator-based hardware and software simulation for image processing (XSG). The Simulink model is used in many hardware processes in many different Xilinx operations, and this could implement on a variety of FPGAs. This paper outlines an effective architecture for a variety of applications. Image negative processing algorithms, Image Edge Detection, enhancement, contrast stretching. Range Highlighting, Image Brightness Control, Parabola transformation for Grayscale photos and Color photos with few feasible blocks used in System Generators. The performance of various architectures in Virtex5 prototyping FPGA board XUPV5- LX110T is presented.

Keywords: Image Processing, Xilinx System Generator, Field Programmable Gate Array (FPGA), Simulink and transformation.

How to Cite:

[1] S.Soorya, E.Sriram, S.Shameer Hussain, S.Sivasankar, Mr.C.Saravanakumar, β€œAn Experimental Verification Of Meritorious Effect Of The Shared Resources In Design Of Arithmetic Circuits,” International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering (IJIREEICE), DOI: 10.17148/IJIREEICE.2022.10464

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