Design and Implementation of an Isolated Power Factor Correction using Full Bridge Topology

Abstract: Power Factor, the ratio between the real or average power and the apparent power forms a very essential parameter in power system. It is indicative of how effectively the real power of the system has been utilized. With rapid development in power semiconductor devices, the usage of power electronic systems has expanded to new and wide application range that include residential, commercial, aerospace and many others. Power electronic interfaces e.g. switch mode power supplies (SMPS) have proved to be superior over traditional linear power supplies. However, their non-linear behaviour puts a question mark on their high efficiency. The current drawn by the SMPSs from the line is distorted resulting in a high Total Harmonic Distortion (THD) and low Power Factor (PF). Individually, a device with harmonic current does not pose much serious problem however when used on a massive scale the utility power supply condition could be detoriated. Other adverse effects on the power system include increased magnitudes of neutral currents in three-phase systems, overheating in transformers and induction motors etc. Hence, there is a continuous need for power factor improvement and reduction of line current harmonics. Development of new circuit topologies and control strategies for Power Factor Correction (PFC) and harmonic reduction has become still more essential with the introduction of strong technical IEC standards. These is the review paper in which comparison for circuit with PFC and circuit without PFC by using MATLAB/SIMULINK.

Keywords: Power factor, Switch mode power supply (SMPS), power factor correction.