Design of Power efficient and low area FIR filter using Approximate Circuits

Abstract: In DSP, the Finite Impulse Response (FIR) filter and Infinite Impulse Response (IIR) filter plays a vital role in the design of a complex signal processing system. Most of the IIR filters are used in signal processing applications because of its less computational complexity as compared to the FIR filters. The FIR filter requires only fewer filter coefficients and less amount storage registers. In this research, I propose an FIR filter with Array multiplier and Carry Skip Adder (CSA) to improve hardware utilization and minimize the power of the overall design of an FIR filter. Carry skip Adder is also named as Carry by-pass adder which consists of special circuitry to improve the speed and reducing the carry propagation delay. This circuitry contains two main blocks namely, AND block and multiplexer block which are together defined as block propagate blocks.

Keywords: FIR (Finite Impulse Response), IIR (Infinite Impulse Response), SNR (Signal to Noise Ratio), FPGA (Field Programmable Gate Array), LUT (Look Up Table), CSA ( Carry Skip Adder), RCA (Ripple Carry Adder), AM (Array Multiplier), IOB (Input Output Block). GDI (Gate Diffusion Input).