VLSI Design of reversible Arithmetic and Logic Unit (ALU) using Verilog HDL

Abstract: Reversible rationale is broadly being considered as the potential rationale configuration style for usage in present day nanotechnology and quantum registering with insignificant effect on physical entropy. Late advances in reversible rationale take into consideration improved quantum PC calculations and plans for comparing PC models. Huge commitments have been made in the writing towards the plan of reversible rationale door structures and number juggling units, nonetheless, there are very few endeavors coordinated towards the plan f reversible ALUs. In this paper, we propose the plan of two programmable reversible rationale door structures focused at ALU usage and their utilization in the acknowledgment of a productive reversible ALU is illustrated. The proposed ALU configuration is checked and its points of interest over the main existing ALU configuration are quantitatively dissected.

Keywords: VLSI,HDL,ALU,reverse concepts