International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control EngineeringA monthly Peer-reviewed & Refereed journal
IJIREEICE meets the suggestive parameters outlined in the latest University Grants Commission (UGC) for peer-reviewed journals, ensuring high standards of research integrity, publication ethics, and academic excellence.
Abstract: Electrocardiogram (ECG) is a commonly recorded bio-signal that captures the electrical activity of the heart. Identifying various features and traits could help us detect the normal and pathological physiology of the heart, thus providing valuable information about the activity of the human heart which is a very important step in ECG signal analysis. Computer processing of ECG has evolved as an emerging tool in medical diagnosis for effective treatments. The work proposed in this paper deals with the detection of the R peak and its feature evaluation and reviews and summarizes the various techniques used by researchers in order to detect the same. ECG signals in this work are collected from several places and it has been implemented using MATLAB routine consisting of four different databases formats. The processing of the data was done on the Lead-II ECG signals.
Keywords: Electrocardiogram (ECG), R Peak, Lead-II Configuration, Pan Tompkins Algorithm, Matlab
Abstract: A microscopy system has been introduced based on a Position Sensitive Detector (PSD). In our previous research, the geometric error factors that are caused by the pincushion-type distortion of these sensors were investigated and were addressed to significantly reduce Signal to Noise Ratio (SNR) in PSD and the microscopy system. The algorithm used for the microscopy system can be also further improved to achieve a high-precision system based on localized differential method. This approach was implemented in this research resulting in significant improvement in the precision of the microscopy system.
A Design of Flywheel Energy Storage System Damping Controller for Power System Stability Enhancement
Jeong-Phil Lee
DOI: 10.17148/IJIREEICE.2018.6112
Abstract: This paper presents the method of the Flywheel Energy Storage System (FESS) controller using an Immune Algorithm (IA) to efficiently damp low frequency oscillation and to enhance power system stability despite the uncertainties and various disturbances of power system. The controller is designed based on a H control theory and a quantitative feedback theory using the immune algorithm. The FESS controller is designed in which all QFT bounds are satisfied and the H norm is minimized simultaneously. The H norm, QFT bounds and damping ration have been used as the objective function of the IA to optimize the FESS controller. The dynamic characteristic responses by means of time domain nonlinear simulations have been investigated under various disturbances and various operating conditions to verify the robustness of the FESS controller. The control characteristics with the FESS controller have been compared with that of the conventional Power System Stabilizer (PSS). The simulation results show that the FESS controller has more excellent performance to improve the stability of power systems than that of conventional PSS.
Keywords: Flywheel Energy Storage System (FESS), Quantitative Feedback Theory (QFT), Immune Algorithm (IA), Power System Stability, Power Systems Stabilizer (PSS), H Control Theory
Abstract: Wireless transfer refers to any of a number of methods by which electrical power is transferred from a source device or circuit to a sink device or circuit, using electromagnetic waves. Numerous techniques abound in the domain of wireless power transfer technology. The current paper carries out a brief review of the most salient concepts, with a special focus on far-field techniques.
Keywords: Wireless Power Transfer Technology, Magnetic Coupling, Travelling Waves, Near-Field, Far-Field, Coupled-Mode Theory
Design and Implementation of Dual Core and Quad Core Processor in Vertex 6 FPGA Using Pipelined RISC Architecture
Mr. Rakesh M R
DOI: 10.17148/IJIREEICE.2018.6114
Abstract: This paper describes the design of a dual and quad core pipelined Reduced Instruction Set Computer (RISC) processor using Verilog HDL and its implementation in vertex 6 FPGA. Dual and quad core processor consumes less power with high efficiency. The processor has instruction and data memory spaces are both physically and logically separate called Harvard memory architecture. Single core have 5 bit opcode, 23 set of instructions and it is designed by using the pipelining which increase speed of processor. The processor design is done by using RISC architecture which involves Registers (General purpose), Arithmetic and Logical Unit (ALU), Memory (Data and program) with pipeline techniques. Load and Store instructions used to access memory. The comparison of dual and quad core RISC architecture in terms of structure and power consumption is explained in paper with design summary.
Abstract: The integration level in today’s word is continuously increasing in VLSI chips. So that complexity of testing is a major challenge. That is because the internal chip modules have become increasingly midcult to access. There is a significant amount of the testing cost as compared to the total manufacturing cost. Hence there is a necessity to reduce the testing cost. The main factor is the time required to test the circuitry that has the biggest impact on testing cost of a chip. This time can be decreased by reducing the number of tests required to test the chip. So, we simply need to devise a test set that should be small in size. There is one way to generate a small test set is to compact a large test set parameters. The main drawback of the compaction results on the quality of the original test set. This aspect of compaction has motivated the work presented here with some methods of fault detection and avoidance techniques to test the circuit for a fault-free environment.
Keywords: Test circuits, Physical redundancy, Time redundancy, Monotonic logic, Self-checking circuits
Abstract: The paper aims at developing an advanced Electronic Voting Machine (EVM) which helps in free and a fair way of conducting elections employing biometrics in order to avoid rigging and to enhance the accuracy and speed of the process. The design of a solar powered EVM prototype is efficient and allows the user a relief from the laborious act of vote collection and counting. Furthermore, it also removes the errors from the system, since it is a digital device. One of the biggest concerns of EVM is the security system which includes insider threats, network vulnerability and challenges to auditing. To limit these issues the prototype has been developed with a finger print sensor module so as to avoid any malpractices. As a pre-poll procedure, a database consisting of the thumb impressions of all the eligible voters in a constituency is created. During elections, the thumb impression of a voter is entered as input to the system. This is then compared with the available records in the database. If the pattern matches with anyone in the available record, access to cast a vote is granted. But in case the pattern doesn’t match with the records of the database or in case of repetition, access to cast a vote is denied or the vote gets rejected. All the voting machines are connected in a network, through which data transfer takes place to the main host through Internet of Things (IOT).
Keywords: EVM, biometric, solar power, ARM 7 Microcontroller, IOT.
An Efficient Hybrid Spatial Filter for Removal of Speckle Noise in Ultrasound Image
Chetan Prakash Khalane, Prof V. D. Shinde
DOI: 10.17148/IJIREEICE.2018.6118
Abstract: This paper illustrates the characteristics of Switched Reluctance Motor (SRM) which makes it more favourable for commercial Electric Vehicle (EV) application compared to the other types of motors that are being used in automobiles. The design procedure for SRM to use in commercial electric vehicle application is presented. Based on the presented design procedure geometrical parameters for 3kw SRM is derived. Using Finite Element Analysis (FEA) based software tool obtained geometrical parameters of SRM are optimized. Further performance analysis and selection of optimal SRM configuration among 6/4, 8/6 and 12/8 is carried out using FEA. For the selected SRM configuration analytical and FEA results are compared and presented to validate the performance of designed 3kw SRM for commercial electric vehicle application.
Keywords: Electric Vehicle, Machine Design, Switched Reluctance Motor, Optimization, Finite Element Analysis
Energy and QoS Efficient Algorithm for Wireless Body Area Networks
Mr. Niraj Korde, Prof. Urmila Deshmukh
DOI: 10.17148/IJIREEICE.2018.61110
Abstract: Due to emergence of WBAN in real time applications recently, significant research works are reported on communication standards of wireless body area networks (WBANs). The two primary challenges in opportunistic WBANs that are- network management cost reduction and energy consumption reduction in order to deliver the cost- effective and reliable services to critical patients in healthcare application. There are number of solutions reported to address this challenges in recent past, however, they failed to cover all the aspects of WBANs communication. In this, project we proposed novel opportunistic communication protocol for WBANs with aim to solve the research challenges not only the energy efficiency and network management cost reduction but also solves the problem of non-reliable nodes data dissemination. First we proposed the novel energy-efficient and distributed network management cost minimization framework for dynamic connectivity and data dissemination in opportunistic WBANs. Then we proposed a pricing based approach for reliable node data dissemination. This can be done by reputation-based incentive methods to motivate participants to disseminate reliable data in participatory sensing system, while minimizing incentive cost for maintaining sufficient number of reliable participants. The simulation results reveal the effectiveness of proposed method.
Keywords: Cost Management, Energy Management, Opportunistic Communications, Reliable Data Dissemination, Wireless Body Area Networks (WBAN)
Power Quality Analysis of Single Phase Full Bridge Rectifier Fed DC Motor Drive
Karthik Kumar K, Siddharthan S T, Saiayyappa O R
DOI: 10.17148/IJIREEICE.2018.61111
Abstract: This paper provides a power quality analysis of single phase full bridge rectifier fed DC motor drive. A single phase full bridge rectifier is generally used in low voltage distribution system. It is necessary to analyse harmonic level and power factor. Here, DC motor is considered as the rectifier’s load. The THD and power factor analysis is done for different loading conditions. The first analysis is based on variation of delay angle and its effect on THD and power factor. The second analysis is based on variation of torque or the changes in mechanical load done in the motor while maintaining the delay angle as constant. These analyses are useful in quantizing the THD and power factor at various conditions. FFT analysis on the input current provides the information about the various harmonics present in the waveform. The overall analysis is done using MATLAB software.
Keywords: Thyristor (SCR), DC motor, Total harmonic distortion (THD), Power factor (PF), MATLAB software
Abstract: The process of college practical management is tedious. When the practical is created that time all the students gather together around the teacher and teacher tells the concept of practical that is too be performed. This makes students uncomfortable with situations many of the students are not visible, many of them do not get the concept because of disturbance and standing too long, this makes the students to loosen the interest in learning the practical concept. Just to overcome this sort of problem, the proposed application is been developed. By the use of this application i.e. screen sharing the screen of the teacher can be seen on each and every student‟s computer this will make the students comfortable with the practical session. Each and every student will get the concept clearly. Due to screen sharing function the teaching and learning skills will be improve in the college. After the teacher starts the screen sharing session, students can get connected with the session on the approval from teacher. After the session gets over the teacher can willingly make MCQ Questions for the students and on the bases of this MCQ‟s the attendance of the students will be marked. If the student has any problem or doubt with the practical session he/she can personally get screen sharing with teacher‟s computer and clear the doubt. This doubt session will be only within the teacher and the student who has the doubt, it will not affect the other students in the laboratory. The proposed application not only provides the screen sharing facility but it also provides the “Question and Answer Blog”, “Events Picture Sharing”, different log-in facility for teacher, students and HOD (Head Of Department), etc.
Keywords: Distributed System, Networking, Peer to Peer Networking, Recorder, Server Socket, Client Socket, Screen Sharing