International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control EngineeringA monthly Peer-reviewed & Refereed journal
IJIREEICE meets the suggestive parameters outlined in the latest University Grants Commission (UGC) for peer-reviewed journals, ensuring high standards of research integrity, publication ethics, and academic excellence.
Implementation of RIPv1 and OSPF Routing Protocols, DHCP, DNS, and HTTP Configurations in CISCO Packet Tracer
Anas Tukur Balarabe, Zahriya Lawal Hassan, Ahmad Rufa'i
DOI: 10.17148/IJIREEICE.2019.7401
Abstract: This paper gives elaborate descriptions on the implementation of two routing protocols namely: Routing Information Protocol (RIP) and Open Shortest Path First (OSPF). It also covers Variable Length Subnet Mask (VLMS) Dynamic Host Configuration Protocol, Hypertext Transfer Protocol, and Domain Name Server configurations. With dynamic routing protocols, a router has the ability to determine which path to select when routing a packet this is achieved through a frequent update of the routing table by the router using information provided by different networks in a giving set up about their locations. The paper also demonstrates how IP addresses are conserved using Variable Length Subnet Masking.
Analysis of Mechanical Vibration and Fault Detection of Railway Track Using Lab View System
Ms. Arati A. Humbe, Prof. Somnath A. Karmude
DOI: 10.17148/IJIREEICE.2019.7402
Abstract: The main aim of this paper is to develop a Lab view based system for analysis of mechanical vibration and fault detection of railway track. The Indian railway is the biggest means of transportation. But now a days accident due to railway are increase so it is need to have safety element in order to avoid accident. To avoid this problem we are using fault detector robot, which detects the fault in track and also detect obstacle. Vibration sensor is used for crack detection and ultrasonic sensor is used for obstacle detection. GPS provide location track as well as obstacle. SMS will display on LCD. Internet of Things (IOT) is implemented to give an update of crack and obstacle detection with location. The advantages of proposed system are that, it is cheap and suitable to the Indian scenario. The system can be helpful to operate at tunnels as well.
A Theoretical Model for Cloud Computing Adoption Saudi Arabia For Small and Medium Size Enterprise (SMEs) in ICT Sector
Fahad Badr Al-Ameen Nasser, Mohammad Saaed Jawad
DOI: 10.17148/IJIREEICE.2019.7403
Abstract: Cloud computing technology provides different solutions to organizations on demand in order to improve their performance and to lower hardware and software procurement and maintenance cost. There is a rich body of literature on its benefits for SMEs, however, studies that investigate the factors influencing the adoption by SMEs in developing countries especially Saudi Arabia and particularly in Information and Communication Sector (ICT) are still lacking. To fill this gap, this study examines the factors that influence the adoption of cloud computing by Saudi Arabian SMEs. This study seeks to develop a research framework that integrates the innovation characteristics as well as the Technology-Organization-Environment (TOE) perspectives that underlie its adoption. Primarily, the adoption factors for cloud computing are identified and classified into different dimensions using the Technology, Organization and Environment (TOE) framework. This study therefore presents a more holistic assessment of the factors of cloud computing adoption than earlier studies. The study contributes to the wider body of scientific knowledge that, so far, has not studied the adoption of cloud computing in this sector. The findings confirm a high potential for use of the cloud computing market within developing countries and further recommend cloud computing vendors to focus on cloud computing knowledge.
Abstract: The impact of climate change on annual air temperature has received a great deal of attention by scholars worldwide. Many studies have been conducted to illustrate that changes in annual temperature is becoming evident on a global scale. This study focuses on detecting trends in annual temperature for the five major city regions in the India. For this study, the widely used modified Mann-Kendall test was run at 5% significance level on time series data for each of five major city regions for the time period, 1982 to 2018. Mann-Kendall trend statistics is used to show the trend and Sen‟s estimator of slope is used to depict the magnitude of the trend. Lastly, a simple co-relation among the weather variables has been done to show the impact of temperature in changing hydrological conditions of the Country.
LabVIEW based Power Analysis of Solar Tracking System and its Implementation in Real Time (Single Axis)
Ms. Aayuti R. Betude, Prof. Poonam Soni
DOI: 10.17148/IJIREEICE.2019.7405
Abstract: The concern over the environment with respect to power and electricity, solar energy is used to orient various payloads towards the sun in order to the sun energy. Payload can be reflectors, photovoltaic cells, lenses or other optical devices. As the world population is increasing gradually the need for energy is increasing equally. Every day we depend on energy for the purpose of electricity, hot water and fuel for automobiles. Majority of this energy come from fossil fuels, such as coal, oil and natural gas. These are a non renewable energy source, which means that if we use them all up, we can never get more during our life time, so it is important that we use other energy sources, like renewable energy sources. These are energies that can be used again and again such as sunlight, water and wind. The main aim of this proposed system is to absorb maximum solar energy from the solar panel. Here the payload is photovoltaic cell. The solar tracker is the one which traces the sun’s movement continuously, such that maximum amount of sunlight falls on the solar panel which we have designed.
Keywords: Three watt solar panel, At-mega328 microcontroller, DC motor, LabVIEW software, MPPT charge controller
Abstract: An important requirement of electric power distribution systems is the need for automatic operation. In particular, the rapid and reliable transfer of the system from one power source to another during certain system events is important to achieving the reliability goals for such systems and the facility serves. In the existing system, use of four switches to demonstrate the corresponding failure of that power supply has been attempted. By pressing any one of the switches, absence of that particular source can be found out. The switches are connected as input signals to Programmable Logic Controller. In this system the PLC is used. The relay driver IC collects output of PLC, which adjusts relay to maintain continuous supply to the load. This work mainly focuses on the automation. Future add-ons to the product can make it as a complete independent working model .An attempt has been made to study the use of PLC to get uninterrupted power supply without the need of human intervention, saving non-conventional energy and reduce the overall cost as it saves the electricity bill tariffs and the maintenance cost is less as the solar cells lasts long .Use of non-conventional energy sources these days is a transformation in itself.
Keywords: PLC, Solar Energy, Auto Power Supply, Critical Load, Automation
Analysis of Emission Data by using Testbed for Euro VI Norms
Shweta Baraskar, Prof. Rajesh Shekokar
DOI: 10.17148/IJIREEICE.2019.7407
Abstract: The testing of the engine is useful for giving the idea about the overall performance and the emission of the engine. Now a day, the emission factors which are coming out of the engine from the exhaust line affecting the environment on large scale or we can say, the emission coming out of the engine is playing the vital role in the air pollution. We have to reduce the emission factors, so we will be able to maintain the healthy air in the environment. As we are only focusing on the engine emission, we have to analyze the engine. The analysis of engine is the combination of the performance analysis and the emission analysis. For analyzing the engine, we have run the engine in the particular emission cycle. The output of the emission cycle is giving the idea about the engine performance and the engine emission. And, this paper is giving the idea about the whole testbed setup, emission cycle, norms of emission for the diesel engine.
Power Electronic On-Load Tap Changer for HVDC Converter Transformer
Sanjo Sibi Moolamkunnam, Jeffin Mathew, Sajan Joseph, Deepak A
DOI: 10.17148/IJIREEICE.2019.7408
Abstract: High voltage DC transmission is gaining more and more importance due to various advantages over high voltage AC transmission. High voltage DC converter transformer is the main component which is used in HVDC transmission. Tap changer is an essential part of any power transformer for obtaining various turns ratios to get different voltage levels. Conventional mechanical tap changers are commonly employed for this purpose. Mechanical tap changers require continuous maintenance when tap changers require frequent operation. The tap changers in high voltage DC converter transformer is such an application where frequent operation of tap changer is needed. In this work a novel power electronic tap changer is proposed for arc less switching and reduced maintenance even under frequent operations. The basic working of the power electronic tap changer, different topologies and certain design parameters of power electronic tap changer for HVDC converter transformer are evaluated and tested using simulation software and a low voltage working prototype.
Keywords: HVDC, Converter Transformer, Tap changer, HVDC Transmission, Tap selector switch
Low – Power and Error Tolerant Multi – Precision Approximate Multipliers using Voltage and Frequency Management Unit
Dr.V.Suresh Babu, V.Amrutha
DOI: 10.17148/IJIREEICE.2019.7409
Abstract: Approximate computing is an emerging trend in digital design that trades off the requirement of exact computation for improved speed and power performance. The proposed method uses a novel approximate compressors and an algorithm to exploit them for the design of efficient approximate multipliers. The approximate compressors are a key element in the design of power-efficient approximate multipliers, the number of faulty rows in the compressor’s truth table is significantly reduced by encoding its inputs using generate and propagate signals. Further it is converted to Multi Precision (MP) reconfigurable multiplier that incorporates variable precision, Parallel Processing (PP), razor- based Dynamic Voltage Scaling (DVS), and dedicated MP operands scheduling to provide optimum performance for a variety of operating conditions. All of the building blocks of the proposed reconfigurable multiplier can either work as independent smaller-precision multipliers or work in parallel to perform higher-precision multiplications. Given the user’s requirements (e.g., throughput), a dynamic voltage/frequency scaling management unit configures the multiplier to operate at the proper precision and frequency. Based on this improved compressor, two 4×4 multipliers are designed with different accuracies and then are used as building blocks for scaling up to 16×16 and 32×32 multipliers. Comparison with previously presented approximated multipliers shows that the proposed circuits provide better power or speed for a target precision.
Low Transition Test Pattern Generation for Path Delay and Stuck-at-Faults
Dr.S.Kavitha, K.Seeshna Balakrishnan
DOI: 10.17148/IJIREEICE.2019.7410
Abstract: A low transition test pattern generation for path delay and stuck-at-faults is proposed. Main challenges in generating compressed tests are reduced test data volume along with low transition pattern sequence. The proposed work uses BS-LFSR (Bit Swapping-Linear Feedback Shift Register) for generating test pattern. The basic approach that the paper uses modifies initially random seeds for the BS-LFSR into seeds that produce tests for detecting target faults. This approach can find seeds even if the available tests cannot be compressed into seeds. In addition, the procedure described in the proposed method also selects detectable path delay and stuck-at faults to address the presence of undetectable path delay and stuck-at faults in the set of target faults. The Bit-Swapping LFSR (BS-LFSR), is composed of an LFSR and a 2 × 1 Multiplexer and used to generate test patterns which reduces the number of transitions that occur at the scan-chain input during scan shift operation by 50% when compared to those patterns produced by a conventional LFSR. Hence, it reduces the overall switching activity in the circuit under test during test applications. Further, undetectable fault are covered using observation point insertion for improving the fault coverage. Experimental results for fault coverage are analyzed for path delay and stuck-at faults in benchmark circuits.
Keywords: BS-LFSR, Test Data Compression, Test Generation, Low-Power Test, Test Point Insertion
Error Tolerant and Performance Enhanced TCAM for Network Applications
Dr.S.Kavitha, S.Sreekalpa
DOI: 10.17148/IJIREEICE.2019.7411
Abstract: Content Addressable Memory (CAM) is a type of solid-state memory in which data are accessed by their contents rather than physic al locations. Ternary Content Addressable Memories (TCAMs) are special memories which are widely used in high-speed network applications such as routers, firewalls, and network address translators. In high- reliability network applications such as aerospace and defense systems, soft-error tolerant TCAMs are indispensable to prevent data corruption or faults caused by radiation. The proposed work uses a novel soft-error tolerant TCAM for multiple-bit-flip errors using partial keys and parity based logic for search time reduction. The proposed TCAM corrects multiple bit-flip errors and enhances the tolerance of the TCAM against soft errors. TCAM detects multiple- bit-flip errors by the generated X-keys using the X look-up. If the keys match the different locations, then a soft error is suspected and TCAM refreshes the TCAM words by using the backup ECC-SRAM. The proposed CAM also uses parity an extra one-bit segment, derived from the actual data bits. We only obtain the parity bit, i.e., odd or even number of “1”s. This additional parity bit reduces the sensing delay and boosts the driving strength of the 1-mismatch case by half. The hardware overhead of the proposed TCAM is small due to the use of a single TCAM. The parity based TCAM can be easily implemented and is useful for fault-tolerant packet classifiers.
An Effective Framework for an Early Flood Prediction with respect to Water Level using Enhanced ENN
Dr.Shanthi Mahesh, Hitesh Raju
DOI: 10.17148/IJIREEICE.2019.7412
Abstract: In recent years ANN methodology has been effectively used in flood water level prediction model. Moreover most of the works on flood predictions only concentrated on flood model but no prediction on time was proposed. So flood water level prediction is a fresh avenue to embark on in level to give early predictions which is proposed. This work proposed 4 years a head flood level of water prediction using enhanced ENN model for general rivers which can be in any places. So this approach can be applied on any area with any river for flood level of water. The results of actual Elman Neural Network structure indicate with less accuracy so this work extended with enhanced ENN model was introduced. The ENN performance indicates the results which concluded that enhanced ENN which is versatile than the actual ENN framework with significant improvement from the actual ENN framework which can be observed when the enhanced ENN was started.
Keywords: Flood water level prediction: Artificial Neural Network (ANN), Elman Neural Network (ENN), Enhanced ENN
Design of Power - Gated 8T SRAM Cell Design with Improved PDP
R.Sumithra, N.Vaijayanthi
DOI: 10.17148/IJIREEICE.2019.7414
Abstract: The stability and power consumption of SRAM cell are the important factors in current technologies due to variability and voltage scaling. It has become a part of system-on-chip in modern VLSI designs. The existing SRAM cell designs are power hungry and have low performance for fast computing applications. In the proposed work a low power 8T SRAM cell is designed based on power gating mechanism. The Conventional 6T SRAM cell is very much prone to noise during read operation. To overcome the read SNM problem in 6T SRAM cell, configurations of 8T SRAM cells is proposed. 8T SRAM design also improves the cell stability but suffer from bitline leakage noise. Power gated VDD design technique have been employed to reduce the power consumed by the SRAM cell. The proposed design is compared with the conventional 6T SRAM cell. The results show that the gated based 8T SRAM cell is the best performer in terms of power consumption and power delay product. The power gated 8T SRAM cell consumes less power than the conventional 6T SRAM cell and also has a better power-delay-product.
Abstract: This paper proposes energy efficient smart automatic street lighting system. The main objective is to design an energy efficient microcontroller based system which gets turned on and off automatically depending on the ambient lighting. This system consists of LDR, light sensor, and a set of the Light Emitting Diode (LED) module. The system was programmed to automatically turn off during the hours of daylight and only operate during the night and heavy raining or bad weather. Several numbers of tests have been conducted to test and validate the proposed prototype in the different environment. As conclusion, around 77%-81% reduction in power consumption can be achieved through this proposed automatic street lighting system for energy efficiency system design. Also, a demonstration with a real-time proto type model involving costs and implementation procedure has been developed using Internet of Things (IoT) to visualize the real time updates of street processing and notifying the changes occur.
Keywords: LDR, Energy Efficiency, Light Sensor, Automatic Lighting, Microcontroller, IoT
Abstract: Street lighting systems contribute significantly to the power consumption by public systems in urban and semi-urban localities. The current paper examines various switching schemes to optimally switch on and switch off street lights according to the level of ambient darkness in a locality. The paper proposes a simple, cost-optimal automatic switching scheme for street lights using LDRs and 555 timer ICs. The scheme implements smart switching of street lights without investing in expensive controllers.
Abstract: Home automation is one of the research areas that have become very relevant in the last few years. Home automation allows for remote monitoring of connected home appliances using microcontrollers and sensors, allowing for multiple benefits ranging from security to energy efficiency. The current work briefly reviews different wireless home automation systems and then puts forward a proposal for a cheap, efficient, web-based wireless home automation solution using Raspberry-Pi.
Keywords: wireless, home automation, web-based GUI, Raspberry-Pi, microcontroller, sensor
Prof. V. B. Kumbhar, Prof. Mrs. Y.V. Sawant, Pranav Kavathekar, Tanmay Joshi
DOI: 10.17148/IJIREEICE.2019.7418
Abstract: In this paper we discussed about “Smart bus tracking system” which aim to betterment of people and customer satisfaction which is fulfilled by this system. Such a big percentage of public is travelling by bus transport in India and the biggest problem these people are facing is related to the time table of buses and availability of seats in the bus. Either the buses are not on time or the seats are not available in the bus. In addition to this the control room are unaware of live location of the buses so they can’t predict the exact arrival time of bus at specific depot and neither do they have any information regarding the vacant seats.
Image Splicing Detection with Markov features and PCA
Rachna Mehta, Navneet Agarwal
DOI: 10.17148/IJIREEICE.2019.7419
Abstract: Image splicing is exceptionally normal and central in picture altering. Along these lines, picture splicing detection has pulled in increasingly more consideration as of late in digital image forensics. grey pictures are utilized straightforwardly, or colour pictures are changed over to grey pictures before be handled in past picture splicing detection algorithms. Be that as it may, most forged pictures are can be color or grey pictures. So as to utilize the grey data in pictures, a classification algorithm is upgraded which can utilize grey pictures with Spatial, DCT and DWT features directly. In this paper, an algorithm dependent on Markov chain with spatial, DCT and DWT area is proposed for picture splicing detection. As a matter of first importance, grey data is generated from blocked pictures to build DCT and DWT in an entire way, and the DCT and DWT coefficients of blocked pictures can be obtained. Furthermore, the expended Markov features created from the Transition probability matrix in spatial, DCT and DWT area can catch the intra-block, yet additionally the Inter block correlation between's blocked DCT and DWT coefficients. Then we use PCA for reducing the dimensionality of pictures and enhancing the correlation among pixels. At long last, ENSEMBLE classifier is used to classify the Markov feature vector. The final results show that the proposed algorithm not just utilize grey data of pictures, yet in addition can yield significantly better detection results in contrasted to previous work for splicing detection methods applied on same equivalent dataset